What is Avalanche Test of Power MOSFETs? (Part 1)

Hello everyone.
I’m Nakamatsu from the Power Device Design Section.

In my last blog, I explained how short-circuit tests are conducted, and this time, I would like to mention avalanche capability tests of power MOSFETs also as one of destructive tests.
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When a power device is exposed to a voltage higher than its withstand voltage, a current begins to increase rapidly (called avalanche mode), leading to destruction. Avalanche capability tests measures the avalanche capability, which is how much energy the device can withstand. The sudden current increase looks like an avalanche, so this phenomenon is called avalanche breakdown.

Taking the case where a voltage higher than the withstand voltage is applied to a power MOSFET as an example, let me explain how avalanche breakdown occurs in the conceptual drawing of Figure 1.




Fig.1 Conceptual drawing of avalanche breakdown


  1. A high electric field accelerates carriers in a depletion layer of a MOSFET.
  2. When sufficiently accelerated carriers collide with atoms, valence electrons are knocked out of the atoms resulting in newly generated electron-hole pairs.
  3. The carriers that collide with the atoms and the newly generated carriers are each accelerated by the high electric field.
  4. Each of them collides with other atoms, producing additional electrons and holes.
  5. With this process being repeated, the number of carriers increases in a chain reaction, creating current flows.

In snow-covered mountains, small snowslide can trigger large avalanches, and the name “avalanche breakdown” comes from the fact that a similar phenomenon occurs in semiconductors.

In power MOSFETs, stray inductance in a circuit or leakage inductance in a transformer can cause an overvoltage when the MOSFET is turned off, leading to avalanche mode. In the avalanche mode, a power MOSFET is subjected to extreme stress, resulting in deterioration of reliability and in the worst case, destruction of the MOSFET. Although there are power MOSFETs that tolerate the avalanche mode, it is desirable to design the circuit to prevent the MOSFETs from reaching the avalanche mode as much as possible.

As I mentioned above, the avalanche capability is an indicator of how much the device can withstand the excessive burden when operated in the avalanche mode, and is specified in terms of current and energy in data sheets.

And in order to verify that there is no problem if a power MOSFET enters the avalanche mode by any chance, it is necessary to check the avalanche capability of the power MOSFET when designing power electronics circuits.

The following is a test circuit and waveforms to measure avalanche capability. This test is called Unclamped Inductive Switching (UIS). In this test, the DUT is turned on once to store energy in the L load to be a current source, then it’s turned off. Then the avalanche operation is induced by the back electromotive force of the L load and the supply voltage, when the energy during the avalanche period can be measured.


Fig.2 UIS test circuit and waveforms



Now let’s find the avalanche energy EAS, which is the energy consumed during the avalanche period. First, find the time tAV of the avalanche period. Let the peak value of the current be the avalanche current IAS, the supply voltage be VDD, and the value of the L load be L. Assuming that the avalanche voltage BVDSS is constant, tAV is :



Thus, EAS is:



We can see EAS is proportional to L, and proportional to the square of IAS.

Here, you may wonder if it is OK to compare avalanche capabilities on a data sheet under the condition that the EAS is the same though the values of L and IAS are different? For example, L=100µH, IAS=20A and L=400µH, IAS=10A are the same in terms of energy. As it turns out, there is a problem, which I will explain in the next article.

WTI has a special test environment for power devices and engineers with rich expertise for special tests, so please contact us if you need evaluation of various power devices, including avalanche capability tests.


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